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www.powerint.com may 2011 lnk584-586 linkzero-ax zero standby consumption integrated off-line switcher ? product highlights lowest system cost with zero standby consumption ? simple system confguration provides zero consumption standby/power-down with user controlled wake up ? very tight ic parameter tolerances improves system manufac - turing yield ? suitable for low-cost clampless designs ? frequency jittering greatly reduces emi flter cost ? extended package creepage improves system feld reliability advanced protection/safety features ? hysteretic thermal shutdown protection C automatic recovery reduces feld returns ? universal input range allows worldwide operation ? auto-restart reduces delivered power by >85% during short-circuit and open loop fault conditions ? simple on/off control, no loop compensation needed ? high bandwidth provides fast turn on with no overshoot ecosmart ? C energy effcient ? standby/power-down consumption less than 3 mw at 325 vdc input (note 1) ? easily meets all global energy effciency regulations with no added components ? on/off control provides constant effciency to very light loads applications ? ultra low consumption isolated or non-isolated standby and auxiliary supplies description linkzero-ax combines extremely low standby/power-down energy use with the industrys lowest component count standby supply solution. below 3 mw at 230 vac in power-down (pd) mode meets iec 62301 defnition of zero power consumption and is immeasurable on most power meters. linkzero-ax is set into power-down mode using an external signal to pull the feedback pin high for 2.5 ms. such an external signal can be generated by a system micro controller or infrared controller. in power-down mode the bypass pin remains regulated allowing the linkzero-ax to be woken up with a reset pulse to pull the bypass pin below a reset threshold (1.5 v). ultra low system consumption is therefore achieved without needing to disconnect the input voltage with a relay. linkzero-ax is designed to be used in isolated or non-isolated converters. in either, the tightly specifed feedback (fb) pin voltage reference enables universal input primary side regulated power supplies that cost effectively replace unregulated linear transformer and other switched mode supplies. the start-up and operating power are derived directly from the drain pin. the internal oscillator frequency is jittered to signifcantly reduce both quasi-peak and average emi, minimizing flter cost. figure 1. typical application schematic. output power table product 3 230 vac 15% 85-265 vac open frame 2 open frame 2 lnk584dg 3 w 3 w lnk584gg 3 w 3 w lnk585dg 4.5 w 4 w lnk585gg 5 w 4.5 w LNK586DG 6 w 5 w lnk586gg 6.5 w 5.5 w table 1. output power table. notes: 1. iec 62301 clause 4.5 rounds standby power use below 5 mw to zero. 2. maximum practical continuous power in an open frame design with adequate heat sinking, measured at 50 c ambient. 3. packages: d: so-8c, g: smd-8c. + + d s bp/m fb dc output wide range high-voltage dc input linkzero-ax power down pulse 2.5 ms pi-5909-120710 p in <0.00 w at 325 vdc in power down mode reset/wake up pulse c bp www.datasheet.co.kr datasheet pdf - http://www..net/
rev. b 05/11 2 lnk584-586 www.powerint.com figure 2. functional block diagram. figure 3. pin confguration. pin functional description drain (d) pin: the power mosfet drain connection provides internal operating current for both start-up, steady-state and power- down mode operation. bypass/multi-functional (bp/m) pin: an external bypass capacitor, 0.1 m f or greater for the internally generated 5.85 v supply is connected to this pin. the minimum value of capacitor is 0.1 m f for internal circuit operation. higher values may be required to enter power-down mode (see linkzero-ax power-down (pd) mode design considerations). an overvoltage protection disables mosfet switching if the current into the pin exceeds 6.5 ma (i sd ). feedback (fb) pin: during normal operation, switching of the power mosfet is controlled by this pin. mosfet switching is disabled when a voltage greater than an internal v fb reference voltage is applied to this pin. the v fb reference voltage is internally set to 1.70 v. linkzero-ax goes into auto-restart mode when the feedback pin voltage has come down to 0.9 v. source (s) pin: this pin is the power mosfet source connection. it is also the ground reference for the bypass and feedback pins. pi-5910-090810 3a 3b d s fb s s bp/m g package (smd-8c) d package (so-8c) 8 5 7 1 4 2 s 6 bp/m fb d 1 2 4 8 7 6 5 s s s s pi-5912-110910 clock oscillator 5.85 v 4.85 v 6.5 v 3 v pu overvoltage protection reset 0.9 v fault source (s) s r q dc max adj auto-restart counter reset jitter + - vi limit leading edge blanking + - drain (d) bypass pin undervoltage current limit feedback (fb) open loop pull up q + + + + regulator 5.85 v generator feedback ref 1.70 v cc cut back 1.70 v - 0.9 v power down counter system power down pu 160 f osc cycles bypass/ multi function (bp/m) www.datasheet.co.kr datasheet pdf - http://www..net/
rev. b 05/11 3 lnk584-586 www.powerint.com linkzero-ax functional description linkzero-ax comprises a 700 v power mosfet switch with a power supply controller on the same die. unlike conventional pwm (pulse width modulation) controllers, it uses a simple on/off control to regulate the output voltage. the controller consists of an oscillator, feedback (sense and logic) controller, 5.85 v regulator, bypass pin undervoltage protection, over- temperature protection, frequency jittering, current limit protection, and leading edge blanking. the controller includes a proprietary power-down mode that automatically reduces standby consump- tion to levels that are immeasurable on most power meters. power-down mode the internal controller will go into power-down mode when 160 switching cycles are skipped. this can occur due to the feedback pin being pulled high using an external power-down pulse signal or due to a light load condition where the total loading on the transformer (output plus feedback circuit loads) has reduced to ~0.6% of full load. the device then operates in an ultra low consumption power-down mode where switching is disabled completely. the controller wakes up (or is reset) when the bypass pin is pulled below 1.5 v and then released to be recharged through the internal drain connected 5.85 v regulator block (see figure 2). when the bypass capacitor recharges to the v bp bypass pin threshold, the device starts switching and operates normally. if the feedback pin is pulled high such that 160 cycles are again skipped, the device returns to power-down mode operation as described above. in applications with dynamic loads it may not be desirable to go into power-down mode under light or no-load conditions. techniques to ensure this is avoided are discussed below in the linkzero-ax power-down mode design considerations section. oscillator the typical oscillator frequency is internally set to an average of 100 khz. an internal circuit senses the duty cycle of the mosfet switch conduction-time and adjusts the oscillator frequency so that during long conduction intervals (low line voltage) the frequency is about 100 khz and at short conduction intervals (high line voltage) the oscillator frequency is about 78 khz. this internal frequency adjustment is used to make the peak power point constant over line voltage. two signals are generated from the oscillator: the maximum duty cycle signal (dc max ) and the clock signal that indicates the beginning of a switching cycle. the oscillator incorporates circuitry that introduces a small amount of frequency jitter, typically 6% of the switching frequency, to minimize emi. the modulation rate of the frequency jitter is set to 1 khz to optimize emi reduction for both average and quasi-peak measurements. the frequency jitter, which is proportional to the oscillator frequency, should be measured with the oscilloscope triggered at the falling edge of the drain voltage waveform. the oscillator frequency is gradually reduced when the feedback pin voltage is lowered below 1.70 v. feedback input circuit cv mode the feedback input circuit reference is set at 1.70 v. when the feedback pin voltage reaches a v fb reference voltage (1.70 v), a low logic level (disable) is generated at the output of the feedback circuit. this output is sampled at the beginning of each cycle. if high, the power mosfet is turned on for that cycle (enabled), otherwise the power mosfet remains off (disabled). since the sampling is done only at the beginning of each cycle, subsequent changes in the feedback pin voltage during the remainder of the cycle are ignored. output power limiting when the feedback pin voltage at full load falls below 1.70 v, the oscillator frequency linearly reduces to typically 60% at the auto-restart threshold voltage of 0.9 v. this function limits the power supply output current and power. 5.85 v regulator the bypass pin voltage is regulated by drawing a current from the drain whenever the mosfet is off if needed to charge up the bypass pin to a typical voltage of 5.85 v. when the mosfet is on, linkzero-ax runs off of the energy stored in the bypass capacitor. extremely low power consumption of the internal circuitry allows linkzero-ax to operate continuously from the current drawn from the drain pin. a bypass capacitor value of 0.1 m f is suffcient for both high frequency decoupling and energy storage. 6.5 v shunt regulator and 8.5 v clamp in addition, there is a shunt regulator that helps maintain the bypass pin at 6.5 v when current is provided to the bypass pin externally. this facilitates powering the device externally through a resistor from the bias winding or power supply output in non-isolated designs, to decrease device dissipation and increase power supply effciency. the 6.5 v shunt regulator is only active in normal operation, and when in power-down mode a clamp at a higher voltage (typical 8.5 v) will clamp the bypass pin. bypass pin undervoltage protection the bypass pin undervoltage circuitry disables the power mosfet when the bypass pin voltage drops below 4.85 v. once the bypass pin voltage drops below 4.85 v, it must rise back to 5.85 v to enable (turn on) the power mosfet. bypass pin overvoltage protection if the bypass pin gets pulled above 6.5 v and the current into the shunt exceeds 6.5 ma a latch will be set and the power mosfet will stop switching. to reset the latch the bypass pin has to be pulled down to below 1.5 v. over-temperature protection the thermal shutdown circuit senses the die temperature. the threshold is set at 142 c typical with a 70 c hysteresis. when the die temperature rises above this threshold (142 c) the power mosfet is disabled and remains disabled until the die temperature falls by 70 c, at which point the mosfet is re-enabled. current limit the current limit circuit senses the current in the power mosfet. when this current exceeds the internal threshold (i limit ), the power mosfet is turned off for the remainder of that cycle. the leading edge blanking circuit inhibits the current limit www.datasheet.co.kr datasheet pdf - http://www..net/
rev. b 05/11 4 lnk584-586 www.powerint.com comparator for a short time (t leb ) after the power mosfet is turned on. this leading edge blanking time has been set so that current spikes caused by capacitance and rectifer reverse recovery time will not cause premature termination of the mosfet conduction. auto restart in the event of a fault condition such as output short-circuit, linkzero-ax enters into auto-restart operation. an internal counter clocked by the oscillator gets reset every time the feedback pin voltage exceeds the feedback pin auto-restart threshold voltage (v fb(ar) typical 0.9 v). if the feedback pin voltage drops below v fb(ar) for more than 145 ms to 170 ms depending on the line voltage, the power mosfet switching is disabled. the auto-restart alternately enables and disables the switching of the power mosfet at a duty cycle of typically 12% until the fault condition is removed. open loop condition on the feedback pin when an open loop condition on the feedback pin is detected, an internal current source pulls up the feedback pin to above the v fb (1.70 v), the part stops switching and after 160 clock cycles goes into latched power-down mode. applications example the circuit shown in figure 4 is a typical non-isolated 5 v, 300 ma output auxiliary power supply using linkzero-ax. isolated confgurations are also fully compatible with the linkzero-ax where the feedback pin receives a signal from a primary feedback/bias winding or through an optocoupler. the circuit of figure 4 is typical of auxiliary supplies in white goods where isolation is often not required. ac input differential fltering is accomplished by the flter formed by c1, c2 and l3. the proprietary frequency jitter feature of the linkzero-ax eliminates the need for any y capacitor or common-mode inductor. wire- wound resistor rf1 is a fusible, fame proof resistor which is used as a fuse as well as to limit inrush current. wire wound types are recommended for designs that operate >132 vac to withstand the instantaneous power dissipated when ac is frst applied. the output voltage is directly sensed through feedback resistors r3 and r9, and regulated by linkzero-ax (u1) via the feedback pin. capacitor c7 provides high frequency fltering on the feedback pin to flter noise and to avoid switching cycle pulse bunching. the controller in u1 receives feedback from the output through feedback resistors r9 and r3. based on that feedback, it enables or disables the switching of its integrated mosfet to maintain output regulation. switching cycles are skipped once the feedback pin threshold voltage (1.70 v) is exceeded. when the voltage on the feedback pin falls below the disable threshold (1.70 v), switching cycles are re-enabled. by adjusting the ratio of enabled to disabled switching cycles the output voltage is regulated. at increased loads, beyond the output peak power point, where all switching cycles are enabled, the feedback pin voltage begins to reduce as the power supply output voltage falls. under this condition the switching frequency is also reduced to limit the maximum output overload power. when the feedback pin voltage drops below the auto-restart threshold (typically 0.9 v on the feedback pin), the power supply enters the auto-restart mode. in this mode, the power supply will turn off for approximately 1.2 s and then turn back on for approximately 145 ms. the auto-restart function reduces the average output current during an output short-circuit condition. figure 4. schematic of non-isolated 1.5 w, 5 v, 300 ma, 0.00 w standby consumption power supply. pi-6121-101210 d s fb bp/m l3 1 mh c1 3.3 f 400 v c5 150 nf 25 v c7 1 nf 50 v c10 47 f 25 v c9 330 nf 50 v c2 3.3 f 400 v c4 220 pf 100 v c8 56 f 16 v c6 220 f 25 v u1 lnk584dg linkzero-ax r2 4.7 k r3 511 1% r16 750 r11 100 r12 20 k r14 2 k r4 10 k r10 20 k r9 1 k 1% t1 ee16 3 10 8 1 r13 510 d6 ss15 r8 5.1 d1 1n4007 d2 1n4007 d3 1n4007 d4 1n4007 l4 1.8 h rf1 10 2 w 85 - 265 vac 5 v, 300 ma rtn pd set pd reset rtn q2 mmbt3904 q1 mmbt3904 sw1 www.datasheet.co.kr datasheet pdf - http://www..net/
rev. b 05/11 5 lnk584-586 www.powerint.com the linkzero-ax device is self biased through the drain pin. an optional external bias, can be derived either from a third winding or from an output voltage rail in non-isolated designs. by providing an external supply current in excess of i s2 (310 m a for the lnk584) the internal 5.85 v regulator circuit is disabled providing a simple way to reduce device temperature and improve effciency, especially at high line. a clampless primary circuit is achieved due to the very tight tolerance current limit device, plus the transformer construction techniques used. the peak drain voltage is therefore limited to typically less than 550 v at 265 vac, providing signifcant margin to the 700 v minimum drain voltage specifcation (bv dss ). output rectifcation and fltering is achieved with output rectifer d6 and flter capacitor c6. due to the auto-restart feature, the average short-circuit output current is signifcantly less than 1 a, allowing low current rating and low cost rectifer d6 to be used. output circuitry is designed to handle a continuous short-circuit on the power supply output. in this design a preload resistor r13 is used at the output of the supply to prevent automatic triggering of the power-down mode when the load is removed. linkzero-ax power-down (pd) mode design considerations linkzero-ax goes into power-down mode when 160 consecutive switching cycles have been skipped. this condition occurs when the output load is low or the feedback pin is pulled high (for example through q1 and r16 in figure 4). the value of the bypass pin capacitor must be high enough to sustain enough current through r16 for more than the period of 160 switching cycles to successfully trigger the power-down mode. at low line input voltage (90 vac) the 160 switching cycle period is ~1.6 ms as the internal oscillator frequency is 100 khz. however as the input line voltage increases, the internal oscillator frequency is gradually reduced to keep the maximum output power relatively constant. at high line (265 vac) therefore, the internal oscillator frequency can be as low as 78 khz (see parameter table note c). therefore to provide suffcient margin to ensure power-down mode is triggered it is recommended that the power-down pulse (see figure 1) is 2.5 ms (200 switching cycles at 80 khz). linkzero-ax stops switching once the power-down mode is triggered. the ic does not resume switching until the bypass pin is pulled below 1.5 v using the reset/wake up pulse (see figure 1) and then allowed to recharge back up to 5.85 v through the drain connected 5.85 v regulator block. transistor q2 or mechanical switch sw1 can be used for resetting the power-down mode either electronically or mechanically. it is important to design the power supply to ensure that load transients and other external events do not unintentionally trigger power-down mode by causing 160 consecutive switching cycles to be skipped. it is recommended that a preload resistor is added to draw ~2% of the full load current (12 ma at 5 v in a 3 w power supply). although this reduces full load effciency slightly, it has no infuence on the power consumption during power-down mode since the power supply output is fully discharged under this condition. low value feedback resistors may also be used as a preload too. recommended value of the feedback resistors is such that they should draw ~1% of full load current. finally a capacitor in parallel to the high side feedback resistor can be used to increase the speed of the loop (c9 in figure 4). these recommendations apply for full load to zero load transients. for applications with more limited load range, the preload and the capacitor in parallel to the high side feedback resistor may not be necessary. layout considerations linkzero-ax layout considerations layout see figure 5 for a recommended circuit board layout for linkzero-ax (u1). single point grounding use a single point ground (kelvin) connection from the input flter capacitor to the area of copper connected to the source pins. bypass capacitor (c bp ), feedback pin noise filter capacitor (c fb ) and feedback resistors to minimize loop area, these two capacitors should be physically located as near as possible to the bypass and source pins, and feedback pin and source pins respectively. also note that to minimize noise pickup, feedback resistors r fb1 and r fb2 are placed close to the feedback pin. primary loop area the area of the primary loop that connects the input flter capacitor, transformer primary and linkzero-ax should be kept as small as possible. primary clamp circuit an external clamp may be used to limit peak voltage on the drain pin at turn off. this can be achieved by using an rcd clamp or a zener (~200 v) and diode clamp across the primary winding. in all cases, to minimize emi, care should be taken to minimize the circuit path from the clamp components to the transformer and linkzero-ax (u1). thermal considerations the copper area underneath the linkzero-ax (u1) acts not only as a single point ground, but also as a heat sink. as it is connected to the quiet source node, this area should be maximized for good heat sinking of u1. the same applies to the cathode of the output diode. y capacitor the placement of the y-type capacitor (if used) should be directly from the primary input flter capacitor positive terminal to the common/return terminal of the transformer secondary. such a placement will route high magnitude common-mode surge currents away from u1. note: if an input emi flter is used, the inductor in the flter should be placed between the negative terminals on the input flter capacitors. www.datasheet.co.kr datasheet pdf - http://www..net/
rev. b 05/11 6 lnk584-586 www.powerint.com output diode (d o ) for best performance, the area of the loop connecting the secondary winding, the output diode (d o ) and the output flter capacitor (c o ) should be minimized. in addition, suffcient copper area should be provided at the anode and cathode terminals of the diode for heat sinking. a larger area is preferred at the electrically quiet cathode terminal. a large anode area can increase high frequency conducted and radiated emi. resistor r s and c s represent the secondary side rc snubber. quick design checklist as with any power supply design, all linkzero-ax designs should be verifed on the bench to make sure that component specifcations are not exceeded under worst-case conditions. the following minimum set of tests is strongly recommended: 1. maximum drain voltage C verify that v ds does not exceed 660 v at the highest input voltage and peak (overload) output power. this margin to the 700 v bv dss specifcation gives margin for design variation, especially in clampless designs. 2. maximum drain current C at maximum ambient temperature, maximum input voltage and peak output (overload) power, verify drain current waveforms for any signs of transformer saturation and excessive leading-edge current spikes at start-up. repeat under steady state conditions and verify that the leading-edge current spike event is below i limit(min) at the end of the t leb(min) . under all conditions, the maximum drain current should be below the specifed absolute maximum ratings. 3. thermal check C at specifed maximum output power, minimum input voltage and maximum ambient temperature, verify that the temperature specifcations are not exceeded for linkzero-ax, transformer, output diode and output capacitors. enough thermal margin should be allowed for part-to-part variation of the r ds(on) of linkzero-ax as specifed in the data sheet. under low line and maximum power, maxi - mum linkzero-ax source pin temperature of 100 c is recommended to allow for these variations. figure 5. pcb layout of a 2.1 w, 6 v, 350 ma charger. + ? hv dc in + ? lv dc out transformer c b r fb1 t1 j3 r6 c o d o u1 c fb r fb2 d bp r bp c bp d b r s c s pi-6098-092410 www.datasheet.co.kr datasheet pdf - http://www..net/
rev. b 05/11 7 lnk584-586 www.powerint.com absolute maximum ratings (1,6) drain voltage .................................. ...... ..................-0.3 v to 700 v peak drain current (2) : lnk584 ........................... 200 (375) ma lnk585 ........................... 370 (680) ma lnk586 ........................... 440 (825) ma peak negative pulsed drain current (3) ................... .......... -10 0 m a feedback voltage ..................................................... .... -0.3 v to 9 v feedback current ...................................................... .......... 100 m a bypass pin voltage ...................................... ............. -0.3 v to 9 v bypass pin voltage in power-down mode (7) ....... -0.3 v to 11 v storage temperature ...................................... ..... -65 c to 150 c operating junction temperature (4) .................... -40 c to 150 c lead temperature (5) ....................................................... ......... 260 c notes: 1. all voltages referenced to source, t a = 25 c. 2. higher peak drain current allowed while drain source voltage does not exceed 400 v. 3. duration not to exceed 2 m s. 4. normally limited by internal circuitry. 5. 1/16 in. from case for 5 seconds. 6. maximum ratings specifed may be applied, one at a time without causing permanent damage to the product. exposure to absolute maximum ratings for extended periods of time may affect product reliability. 7. maximum current into pin is 300 m a. thermal resistance thermal resistance: d package: ( q ja ) .......................... ........ 100 c/w (2) ; 80 c/w (3) ( q jc ) ................................................. ........ 30 c/w (1) g package: ( q ja ) .......................... .......... 70 c/w (2) ; 60 c/w (3) ( q jc ) ................................................. ........ 11 c/w (1) notes: 1. measured on the source pin close to plastic interface. 2. soldered to 0.36 sq. in. (232 mm 2 ), 2 oz. copper clad. 3. soldered to 1 sq. in. (645 mm 2 ), 2 oz. copper clad. parameter symbol conditions source = 0 v; t j = -40 to 125 c (unless otherwise specifed) min typ max units control functions output frequency f osc t j = 25 c v fb = 1.70 v, see note b 93 100 107 khz frequency jitter peak-peak jitter compared to average frequency, t j = 25 c 3 % ratio of output frequency at auto-restart to f osc f osc(ar) f osc t j = 25 c v fb = v fb(ar) 60 % maximum duty cycle dc max 60 63 % feedback pin voltage v fb 1.63 1.70 1.77 v feedback pin voltage at auto- restart v fb(ar) 0.8 0.9 1.05 v minimum switch on-time t on(min) 700 ns drain supply current i s1 feedback voltage > v fb (mosfet not switching) 200 260 m a i s2 0.9 v v fb 1.70 v (mosfet switching) lnk584 260 310 m a lnk585 275 330 lnk586 285 340 www.datasheet.co.kr datasheet pdf - http://www..net/
rev. b 05/11 8 lnk584-586 www.powerint.com parameter symbol conditions source = 0 v; t j = -40 to 125 c (unless otherwise specifed) min typ max units control functions (cont.) bypass pin charge current i ch1 v bp = 0 v, t j = 25 c lnk584 -5.5 -3.8 -1.8 ma lnk585-586 -7.0 -5.3 -3.3 i ch2 v bp = 4 v, t j = 25 c lnk584 -3.8 -2.5 -1.0 lnk585-586 -4.8 -3.5 -2.0 bypass pin voltage v bp 5.60 5.85 6.10 v bypass pin voltage hysteresis v bp(h) 0.8 1.0 1.2 v bypass pin shunt voltage bp shunt 6.1 6.5 6.9 v bypass pin supply current i bpsc see note d 84 m a circuit protection current limit i limit di/dt = 40 ma/ m s t j = 25 c lnk584 126 136 146 ma di/dt = 75 ma/ m s t j = 25 c lnk585 232 250 268 di/dt = 90 ma/ m s t j = 25 c lnk586 279 300 321 power coeffcient i 2 f di/dt = 40 ma/ m s t j = 25 c lnk584 1665 1850 2091 a 2 hz di/dt = 75 ma/ m s t j = 25 c lnk585 5625 6250 7063 di/dt = 90 ma/ m s t j = 25 c lnk586 8100 9000 10170 leading edge blanking time t leb t j = 25 c 220 265 ns bypass pin shutdown threshold current i sd v bp = bp shunt see note f 5.0 6.5 8.0 ma thermal shutdown temperature t sd see note a 135 142 150 c thermal shutdown hysteresis t sd(h) see note a 70 c power-down (pd) mode off-state drain leakage in power-down mode i dss(pd) t j = 25 c, v drain = 325 v see figure 21 6.5 9 m a bypass pin overvoltage protection in power-down mode v bp(pdp) i bp = 300 m a -5 c t j 100 c 7.0 8.5 10.9 v bypass pin power-up reset threshold (in power-down mode or at power supply start-up) v bp(pu) 1.5 3 4 v www.datasheet.co.kr datasheet pdf - http://www..net/
rev. b 05/11 9 lnk584-586 www.powerint.com parameter symbol conditions source = 0 v; t j = -40 to 125 c (unless otherwise specifed) min typ max units power-down (pd) mode (cont.) bypass pin voltage in power-down mode v bp(pd) i bp = 500 m a 4 v bypass pinpower- down to power-up threshold delta v bp(pd) - v bp(pu) 0.5 v bypass pin supply current in power-down mode i bp(pd) v bp = v bp(pd) see note e 500 m a output on-state resistance r ds(on) lnk584 i d = 13 ma t j = 25 c 48 55 w t j = 100 c 76 88 lnk585 i d = 26 ma t j = 25 c 24 28 t j = 100 c 38 44 lnk586 i d = 33 ma t j = 25 c 19 22 t j = 100 c 30 35 breakdown voltage bv dss v bp = 6.2 v, t j = 25 c 700 v drain supply voltage 50 v auto-restart on-time t ar v in = 85 vac, t j = 25 c, see note c 145 ms auto-restart duty cycle 11 % output enable delay t en see figure 8 14 m s notes: a. this parameter is derived from characterization. b. output frequency specifcation applies to low line input voltage in the fnal application. the controller is designed to reduce output frequency by approximately 20% at high line input voltages to balance low line and high line maximum output power. c. the auto-restart on-time/off-time is increased by 20% from low to high line voltage input (85 vac to 265 vac). d. i bpsc is the current that can be supplied from the bypass pin at 5.85 v when in normal switching mode of operation to power an optional external circuit. the current will be supplied from the drain via the internal bypass pin voltage regulator. when calculat - ing the power consumption the i bpsc (84 m a max) and the drain voltage has to be taken into account. more current can be sourced during power-down mode C see note f. e. i bpsc(pd) is the current that can be supplied from the bypass pin at 4 v when in power-down mode to power an optional external circuit. the current will be supplied from the drain via the internal bypass pin voltage regulator. lower current is available during normal operation - see note e. if the external circuit requires current in excess of i bp(pd) in power-down mode, it must be supplied from an external source such as a bias winding. the i bp(pd) current adds to power supply power consumption during power-down mode C for example at 230 vac (325 vdc rectifed dc rail voltage) the power consumption with be 325 i bp(pd) . f. linkzero-ax shuts down if the current into the bypass pin reaches i sd at the bp shunt voltage. www.datasheet.co.kr datasheet pdf - http://www..net/
rev. b 05/11 10 lnk584-586 www.powerint.com figure 7. duty cycle measurement. figure 8. output enable timing. pi-2048-033001 drain vol t age hv 0 v 90% 10% 90% t 2 t 1 d = t 1 t 2 figure 6. general test circuit. figure 9. peak negative pulsed drain current waveform. pi-3707-112503 fb t p t en dc max t p = 1 f osc v drain (internal signal) pi-4021-101305 s s s s bp/m fb d pi-6067-072110 470 5 w s1 50 v 0-2 v 0.1 f www.datasheet.co.kr datasheet pdf - http://www..net/
rev. b 05/11 11 lnk584-586 www.powerint.com typical performance characteristics 1.1 1.0 0.9 -50 -25 02 55 07 5 100 125 150 junction t emperature (c) breakdown v oltage (normalized to 25 c) pi-2213-012301 1.2 1.0 0.8 0.6 0.4 0.2 0 -50 -25 0 25 50 75 100 125 junction temperature ( c) pi-6065-071910 output frequency (normalized to 25 c) 1.4 1.0 1.2 0.8 0.6 0.4 0.2 0 -50 0 50 100 150 temperature ( c) pi-6066-071910 current limit (normalized to 25 c) 1.1 1.0 0.9 -50 -25 02 55 07 5 100 125 150 t emperature (c) feedback pin v oltage (normalized to 25 c) pi-4057-071905 6 5 4 3 2 1 0 0 0.2 0.4 0.6 0.8 1.0 t ime (ms) pi-2240-012301 byp ass pin v oltage (v) 7 100 150 175 200 125 0 0 4 28 61 01 21 41 61 82 0 drain v oltage (v) drain current (ma) pi-3927-083104 25 75 50 figure 10. breakdown vs. temperature. figure 12. current limit vs. temperature. figure 14. bypass pin start-up waveform (c bp = 0.22 m www.datasheet.co.kr datasheet pdf - http://www..net/
rev. b 05/11 12 lnk584-586 www.powerint.com drain v oltage (v) drain capacitance (pf) pi-3928-083104 0 100 200 300 400 500 600 1 10 100 1000 typical performance characteristics (cont.) figure 16. c dss vs. drain voltage. figure 19. feedback pin input characteristics during output power limiting (1.70 v to 0.9 v). figure 17. frequency reduction vs. duty cycle (line voltage). figure 18. feedback pin input characteristics. figure 20. frequency cut back during output power limiting. 110 100 90 80 70 60 0 10 20 30 40 50 60 70 duty cycle (%) pi-6068-071910 frequency (khz) 50 40 30 20 0 10 -10 -20 -30 0.0 1.0 2.0 3.0 4.0 5.0 6.0 7.0 feedback pin voltage (v) pi-6070-072110 feedback pin current (a) 0 -4 -2 -6 -8 -10 -12 -14 -16 -18 -20 0.8 0.9 1.0 1.1 1.2 1.3 1.4 1.5 1.6 1.7 1.8 feedback pin voltage (v) pi-6071-072110 feedback pin current (a) 0 -3 -2 -1 -4 -5 -6 -7 -8 -9 -10 -11 -12 -13 -14 -15 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 frequency normalized to 1 pi-6139-091010 feedback pin current (a) auto-restart figure 21. typical drain current vs. temperature in power-down mode. 10 9 8 7 6 5 4 3 2 1 0 -50 -25 0 25 50 75 100 125 temperature (c) pi-6111-081810 drain current (a) www.datasheet.co.kr datasheet pdf - http://www..net/
rev. b 05/11 13 lnk584-586 www.powerint.com pi-4526-0401 10 d07c 3.90 (0.154) bsc notes: 1. jedec reference: ms-012. 2. package outline exclusive of mold flash and metal burr. 3. package outline inclusive of plating thickness. 4. datums a and b to be determined at datum plane h. 5. controlling dimensions are in millimeters. inch dimensions are shown in parenthesis. angles in degrees. 0.20 (0.008) c 2x 1 4 5 8 2 6.00 (0.236) bsc d 4 a 4.90 (0.193) bsc 2 0.10 (0.004) c 2x d 0.10 (0.004) c 2x a-b 1.27 (0.050) bsc 7x 0.31 - 0.51 (0.012 - 0.020) 0.25 (0.010) m c a-b d 0.25 (0.010) 0.10 (0.004) (0.049 - 0.065) 1.25 - 1.65 1.75 (0.069) 1.35 (0.053) 0.10 (0.004) c 7x c h 1.27 (0.050) 0.40 (0.016) gauge plane 0 - 8 1.04 (0.041) ref 0.25 (0.010) bsc sea ting plane 0.25 (0.010) 0.17 (0.007) det ail a det ail a c sea ting plane pin 1 id b 4 4.90 (0.193) 1.27 (0.050) 0.60 (0.024) 2.00 (0.079) reference solder pad dimensions so-8c (d package) www.datasheet.co.kr datasheet pdf - http://www..net/
rev. b 05/11 14 lnk584-586 www.powerint.com smd-8c (g package) pi-4015-101507 .004 (.10) .012 (.30) .036 (0.91) .044 (1.12) .004 (.10) 0 - 8 .367 (9.32) .387 (9.83) .048 (1.22) .009 (.23) .053 (1.35) .032 (.81) .037 (.94) .125 (3.18) .145 (3.68) -d- notes: 1. controlling dimensions are inches. millimeter sizes are shown in parentheses. 2. dimensions shown do not include mold flash or other protrusions. mold flash or protrusions shall not exceed .006 (.15) on any side. 3. pin locations start with pin 1, and continue counter-clock- wise to pin 8 when viewed from the top. pin 3 is omitted. 4. minimum metal to metal spacing at the package body for the omitted lead location is .137 inch (3.48 mm). 5. lead width measured at package body . 6. d and e are referenced datums on the package body . .057 (1.45) .068 (1.73) (note 5) e s .100 (2.54) (bsc) .372 (9.45) .240 (6.10) .388 (9.86) .260 (6.60) .010 (.25) -e- pin 1 d s .004 (.10) g08c .420 .046 .060 .060 .046 .080 pin 1 .086 .186 .286 solder pad dimensions .137 (3.48) minimum www.datasheet.co.kr datasheet pdf - http://www..net/
rev. b 05/11 15 lnk584-586 www.powerint.com part ordering information ? linkswitch product family ? ax series number ? package identifer d plastic so-8c g plastic smd-8c ? package material g green: halogen free and rohs compliant ? tape & reel and other options blank standard confgurations tl tape & reel, 2.5 k pcs minimum for d package, 1 k pcs minimum for g package. lnk 584 d g - tl www.datasheet.co.kr datasheet pdf - http://www..net/
revision notes date a initial release 10/10 b added lnk585 and lnk586 05/11 for the latest updates, visit our website: www.powerint.com power integrations reserves the right to make changes to its products at any time to improve reliability or manufacturability. power integrations does not assume any liability arising from the use of any device or circuit described herein. power integrations makes no warranty herein and specifically disclaims all warranties including, without limitation, the implied warranties of merchantability, fitness for a particular purpose, and non-infringement of third party rights. patent information the products and applications illustrated herein (including transformer construction and circuits external to the products) may be covered by one or more u.s. and foreign patents, or power integrationslly by pending u.s. and foreign patent applications assigned to power integrations. a complete list of power integrations patents may be found at www.powerint.com. power integrations grants its customers a license under certain patent rights as set forth at http://www.powerint.com/ip.htm. life support policy power integrations products are not authorized for use as critical components in life support devices or systems without the express written approval of the president of power integrations. as used herein: 1. a life support device or system is one which, (i) is intended for surgical implant into the body, or (ii) supports or sustains life, and (iii) whose failure to perform, when properly used in accordance with instructions for use, can be reasonably expected to result in signifcant injury or death to the user. 2. a critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. the pi logo, topswitch, tinyswitch, linkswitch, dpa-switch, peakswitch, capzero, senzero, linkzero, hiperpfs, hipertfs, qspeed, ecosmart, clampless, e-shield, filterfuse, stakfet, pi expert and pi facts are trademarks of power integrations, inc. other trademarks are property of their respective companies. ?2011, power integrations, inc. power integrations worldwide sales support locations world headquarters 5245 hellyer avenue san jose, ca 95138, usa. main: +1-408-414-9200 customer service: phone: +1-408-414-9665 fax: +1-408-414-9765 e-mail: usasales@powerint.com china (shanghai) rm 1601/1610, tower 1, kerry everbright city no. 218 tianmu road west, shanghai, p.r.c. 200070 phone: +86-21-6354-6323 fax: +86-21-6354-6325 e-mail: chinasales@powerint.com china (shenzhen) rm a, b & c 4th floor, block c, electronics science and technology bldg., 2070 shennan zhong rd, shenzhen, guangdong, china, 518031 phone: +86-755-8379-3243 fax: +86-755-8379-5828 e-mail: chinasales@powerint.com germany rueckertstrasse 3 d-80336, munich germany phone: +49-89-5527-3910 fax: +49-89-5527-3920 e-mail: eurosales@powerint.com india #1, 14th main road vasanthanagar bangalore-560052 india phone: +91-80-4113-8020 fax: +91-80-4113-8023 e-mail: indiasales@powerint.com italy via de amicis 2 20091 bresso mi italy phone: +39-028-928-6000 fax: +39-028-928-6009 e-mail: eurosales@powerint.com japan kosei dai-3 bldg. 2-12-11, shin-yokomana, kohoku-ku yokohama-shi kanagwan 222-0033 japan phone: +81-45-471-1021 fax: +81-45-471-3717 e-mail: japansales@powerint.com korea rm 602, 6fl korea city air terminal b/d, 159-6 samsung-dong, kangnam-gu, seoul, 135-728, korea phone: +82-2-2016-6610 fax: +82-2-2016-6630 e-mail: koreasales@powerint.com singapore 51 newton road #15-08/10 goldhill plaza singapore, 308900 phone: +65-6358-2160 fax: +65-6358-2015 e-mail: singaporesales@powerint.com taiwan 5f, no. 318, nei hu rd., sec. 1 nei hu dist. taipei, taiwan 114, r.o.c. phone: +886-2-2659-4570 fax: +886-2-2659-4550 e-mail: taiwansales@powerint.com europe hq 1st floor, st. jamess house east street, farnham surrey gu9 7tj united kingdom phone: +44 (0) 1252-730-141 fax: +44 (0) 1252-727-689 e-mail: eurosales@powerint.com applications hotline world wide +1-408-414-9660 applications fax world wide +1-408-414-9760 www.datasheet.co.kr datasheet pdf - http://www..net/

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